This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at
ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie
4, place Jussieu
75252 PARIS Cedex 05
FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr
The information file should be used to help the functional abstractor YAGLE or the timing analyzer TAS. It contains information which reduces run time and avoids false errors. The information file should have the `.inf' extension and its name must be the name of the corresponding circuit. YAGLE and TAS will take it into account if the `-i' option is used. This file contains several sections. Each one begins with a keyword. The declaration order is not important and it is possible to use a section more than once. Seperators are blanks, tabulations or newlines and there is no difference between upper or lower case characters.
If some of the circuit terminals are mutually exclusive, this should be indicated in the MUTEX section using:
User can renames some signals in the RENAME section. For each signal, the old name and the new name should be given.
new_name will replace existing_name in the behavioural description file. It is possible to use the joker `*'. When the names contain the string gno", this string is replaced by the string latch_data" (l2_y_gno_01 is replaced by l2_y_latch_data_01).
To eliminate some critical paths, a BYPASS section should be used.
Each line ends with the semi-colon character and the section ends with the END keyword. If a signal appears with no argument, the timing analyzer eliminates all pathes which cross it. With the `>' argument, all paths which end on the signal will be supressed and with the `<' argument, all paths beginning on the signal are suppressed.
To perform timing analysis in a specific case, the user can apply a pattern on the netlist with the CONSTRAINT section. It contains internal or external signals constrained by one or zero". The timing analyser propagates the pattern before delay estimation.
Each line ends with the semi-colon character and the section ends with the END keyword.
Signals whose names end in _p are considered to be precharged and therefore dealt with differently by the timing analyzer. If any other signals should be considered precharged these can be specified in the PRECHARGE section.
Each line ends with the semi-colon character and the section ends with the END keyword. If a signal name is preceded by the `~' character then this signal will not be treated as a precharge, this is to deal with the case of non-precharge signals whose names end in _p".
In order to reduce the number of critical paths identified by the timing analyzer, it can sometimes be useful to specify that certain internal signals be considered as though they were path terminals. The list of these intermediary points is specified in the INTER section. Correct choice of these signals can lead to factorization of the critical paths, and hence a significant reduction in the size of the output file generated.
Each line ends with the semi-colon character and the section ends with the END keyword.
Another technique for reducing the size of the critical path list is to limit the number of signals which are considered to be path terminals. The list of signals which are allowed to start a critical path is specified in the PATHIN section, and the list of signals allowed to end a critical path is specified in the PATHOUT section.
Each line ends with the semi-colon character and both sections end with the END keyword.
This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi
research team.
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If you find bugs, please fill-in the form at
http://asim.lip6.fr/alliance/support/bug-report/
Thanks for doing this.