David T. Wang wrote:<br> <br> Stefan Agnvall (eedstag@eede.ericsson.se) wrote:<br> : ShaheenSEI wrote:<br> : <br> : Hello,<br> : <br> : I am trying to learn about IC Design, and layout to produce a<br> Chip.<br> : I am lloking for tools for schematic entry, spice simualtions,<br> layout,<br> : design rule checking and final simulation. Dont have the money to<br> buy the<br> : commerical<br> : packages like Cadence etc.<br> : <br> : I know that Berkely, MIT , we use to have something like that at<br> Purdue,<br> : must have soemthing like that that is in house developed and works<br> on PC's<br> : of<br> : Linux enviorment.<br> : <br> : Are there any reasonable freeware available.<br> : Thanks.<br> : <br> : Please e-mail me, shaheensei@aol.com<br> <br> : There is a package called 'alliance' developed by INRIA in France.<br> ^^^^^^<br> C'est bien Alliance, c'est utilise a l'etranger, mais on<br> se demande si ca vaut le coup de travailler pour l'INRIA. <br> <p> : It contains a VHDL simulator and synthesis tools as well as some<br> : ASIC libraries.<br> : Search the web on alliance+VHDL or alliance+ASIC or something.<br> <p> -- +--------------------------------------------------------------------+ VUONG Huu Nghia Laboratoire d'Informatique de Paris 6 Architecture des Systemes Integres et Micro-électronique +--------------------------------------------------------------------+ Voice : (33 1) 44 27 39 67 Universite Pierre et Marie Curie Fax : (33 1) 44 27 72 80 4 place Jussieu, 75252 Paris Cedex 05 E-mail : vuong@asim.lip6.fr FRANCE