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Origin

This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie 4, place Jussieu 75252 PARIS Cedex 05 FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr

Name

DP_TRACE - Eanble/disable trace mode.

Synopsys

#include <fpgen.h>

void DP_TRACE(
long aMode ); /* Mode value. */

Arguments

aMode
Set the trace mode, two values are allowed :
-
TRACE_ON : Enable trace mode.
-
TRACE_OFF : Disable trace mode.

Description

DP_TRACE allow the designer to see on the standart output the execution of his fpgen(1) program. With DP_TRACE you can see the order of the function calls, which arguments are given to these functions and how instances are internally wired in the netlist. With DP_TRACE programs can be partially or completly traced.
A DP_TRACE call can take place at any location in a C source file, even before the first DP_DEFLOFIG(3) .

Example

#include <genlib.h>
#include <fpgen.h>

main()
{
/* Create a new data-path figure named my_sweet_data_path". */ DP_DEFLOFIG( my_sweet_data_path", 32, LSB_INDEX_ZERO );

/* Data-path netlist description, using macro-functions. * The following fpgen functions are not traced. */
/* ... */

/* Trace mode enabled, fpgen functions called after this point * will be traced.
*/
DP_TRACE( TRACE_ON );

/* ... */

/* Trace mode desabled. */
DP_TRACE( TRACE_OFF );

/* ... */

/* Save the model on disk. */
DP_SAVLOFIG();
}

See Also

fpgen(1) , dpr(1) , genlib(1) , mbk(1) , DP_DEFLOFIG(3) , DP_SAVLOFIG(3) , DP_LOCON(3) , DP_IMPORT(3) , DP_INV(3) , DP_BUSE(3) , DP_AND2(3) , DP_NAND2(3) , DP_AND3(3) , DP_NAND3(3) , DP_OR2(3) , DP_NOR2(3) , DP_OR3(3) , DP_NOR3(3) , DP_XOR2(3) , DP_XNOR2(3) , DP_NAND2MASK(3) , DP_NOR2MASK(3) , DP_XNOR2MASK(3) , DP_CONST(3) , DP_NMUX2CS(3) , DP_MUX2CS(3) , DP_MUX3CS(3) , DP_MUX4CS(3) , DP_MUX5CS(3) , DP_BUSE(3) , DP_NBUSE(3) , DP_ADD2F(3) , DP_ADSB2F(3) , DP_SHIFT(3) , DP_MULT(3) , DP_MULTP(3) , DP_NUL(3) , DP_PDFF(3) , DP_PDFFR(3) , DP_PDFFT(3) , DP_PDFFRT(3) , DP_RFG1C0(3) , DP_RFG1CC(3) , DP_RFG2C0(3) , DP_RFG2CC(3) ,

Bug Report

This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools. If you find bugs, please fill-in the form at http://asim.lip6.fr/alliance/support/bug-report/ Thanks for doing this.


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