The DLXm tutorial / Back Annotations


Introduction

To validate the DLXm microprocessor a CPU board has been described using VHDL. The board has six components:

The DLXm board has the following map:

Starts at Finishes at
User RAM 0x00000000 0x000000FF
Off-board RAM extension 0x00000100 0x7FFFFEFF
User ROM 0x7FFFFF00 0x7FFFFFFF
System RAM 0x80000000 0x800000FF
System Timer 0x80000100 0x800001FF
Off-board RAM extension 0x80000200 0xFFFFFFFF
System ROM 0xFFFFFF00 0xFFFFFFFF
DLXm Board System map.

Hence, the decoder just uses the upper 24 bits to decode.

The simulation is done by executing short assembly programs (which were previously assembled using DLX_ASM v. 0.2 (Assembler for DLX processor) and watching the address bus to detect the fetch of the good or the bad address and aborts when the instruction has been fetched 3 times.

The chosen assembly files for the tutorial are add000.s and add000.u. The corresponding files are shown below:

Address Contents Source Code





























0xFFFFFFF0
0xFFFFFFF1

0xFFFFFFF2
0xFFFFFFF3




0xFFFFFF00
0xFFFFFF01
0xFFFFFF02
0xFFFFFF03


0xFFFFFF04






0xFFFFFF05
0xFFFFFF06
0xFFFFFF07
0xFFFFFF08
0xFFFFFF09
0xFFFFFF0A
0xFFFFFF0B
0xFFFFFF0C
0xFFFFFF0D
0xFFFFFF0E
0xFFFFFF0F
0xFFFFFF10
0xFFFFFF11































E3FFFFC3
00000000

E8000000
00000000




C800E802
93BD0008
D7A00002
00000000


E3FFFFFF






3C1E8000
97DE0000
C800E802
941CFFFF
83BCE800
3C1C0003
87BCE800
CFA00002
3C1D7FFF
97BDFF00
CFA00001
E000002D
00000000


;  ###----------------------------------------------------------------###
;  #                                                                    #
;  # file       : add000.s                                              #
;  # date       : Oct 21 1994                                           #
;  #                                                                    #
;  # origin     : this description has been developed by CAO-VLSI team  #
;  #              at MASI laboratory, University Pierre et Marie Curie  #
;  #              URA CNRS 818, Institut Blaise Pascal                  #
;  #              4 Place Jussieu 75252 Paris Cedex 05 - France         #
;  # E-mail     : cao-vlsi@masi.ibp.fr                                  #
;  #                                                                    #
;  # descr.     : functional test for dlx                               #
;  #                                                                    #
;  ###----------------------------------------------------------------###

    ;  ###--------------------------------------------------------###
    ;  #   initialization program (RESET)                           #
    ;  ###--------------------------------------------------------###

reset_mask      EQU     X"0008"
system_stack    EQU     X"80000000"

user_status     EQU     X"0003"
user_prog       EQU     X"7fffff00"

                ORG     X"fffffff0"
                START   it_handler

it_handler:
                j       handler_body
                nop
return:
                rfe                             ; return from exception
                nop


                ORG     X"ffffff00"
handler_body:
                movs2i  r29, sr                 ; read Status to test it
                andi    r29, r29, reset_mask    ; reset ?
                bnez    r29, hardware_reset
                nop

other_causes:
                j       other_causes

    ;  ###--------------------------------------------------------###
    ;  #   initialization program (hardware RESET)                  #
    ;  ###--------------------------------------------------------###

hardware_reset:
                loadi   r30, system_stack       ; init system stack pointer

                movs2i  r29, sr                 ; load Status to initialize
                ori     r28, r0 , X"ffff"       ; clear high order bits of
                and     r29, r29, r28           ;+the status register
                lhi     r28, user_status        ; init status register
                or      r29, r29, r28           ;
                movi2s  sr , r29
                loadi   r29, user_prog

                movi2s  iar, r29
                j       return
                nop

                END
add000.s

Address Contents Source Code


























0x7FFFFF00
0x7FFFFF01
0x7FFFFF02

0x7FFFFF03
0x7FFFFF04
0x7FFFFF05
0x7FFFFF06
0x7FFFFF07



0x7FFFFFF0
0x7FFFFFF1

0x7FFFFFF2
0x7FFFFFF3




























1001000A
10020002
00411800

5065000C
D4A00037
00000000
E0000037
00000000



E3FFFFFF
00000000

E3FFFFFF
00000000


;  ###----------------------------------------------------------------###
;  #                                                                    #
;  # file       : add000.u                                              #
;  # date       : Apr  1 1993                                           #
;  #                                                                    #
;  # origin     : this description has been developed by CAO-VLSI team  #
;  #              at MASI laboratory, University Pierre et Marie Curie  #
;  #              URA CNRS 818, Institut Blaise Pascal                  #
;  #              4 Place Jussieu 75252 Paris Cedex 05 - France         #
;  # E-mail     :      cao-vlsi@masi.ibp.fr                             #
;  #                                                                    #
;  # descr.     : functional test for dlx                               #
;  #                                                                    #
;  ###----------------------------------------------------------------###

        ;  ###--------------------------------------------------------###
        ;  #   signed addition                                          #
        ;  ###--------------------------------------------------------###

val1            EQU     X"000a"
val2            EQU     X"0002"

                ORG     X"7fffff00"
                START   init

init:
                addi    r1 , r0 , val1
                addi    r2 , r0 , val2
                add     r3 , r2 , r1

                seqi    r5 , r3 , (val1 + val2)
                bnez    r5      , good
                nop
                j       bad
                nop

                ORG     X"7ffffff0"
good:
                j       good
                nop
bad:
                j       bad
                nop

                END
add000.u

Those locations that does not appear here have 00000000 (nops) as contents.

 



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