Alliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator and a data-path compiler. Alliance is the result of a ten year effort spent at ASIM department of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France). Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router. More...

   

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Alliance VLSI CAD System is free software. Binaries, source code and cells libraries are freely available under the GNU General Public License (GPL). You are welcome to use the software package even for commercial designs without any fee. You are just required to mention : "Designed with Alliance © ASIM/LIP6 Université Pierre et Marie Curie"

 

Latest:

Official release: 4.0.6 2000/02/01
Developer release: 4.9.4 2002/02/26
Web change: Alliance mailing-lists 2002/02/13
Mail in ML: alliance-support '02: VHD 2002/03/13
Source change: CVS log for src/mbkedif/M 2002/03/12

 

 

Please note that documentation and tutorials might not be up to date. Known problems are :

 



Alliance Web Site © 1997, 2002 ASIM/LIP6/UPMC, page maintained by Czo [Olivier Sirol] , last updated on 27 February 2002.