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Name

bop
- boolean optimization of a logic level behavioural description (VHDL data flow)

Origin

This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie 4, place Jussieu 75252 PARIS Cedex 05 FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr

Synopsis

bop [-o|-l] data_flow_file output_file [parameter_file]

Description

Input description

The logic level behavioural description (.vbe file) uses the same VHDL subset as the logic simulator asimut, the FSM synthesizer syf, the functional abstractor yagle and the formal prover proof (for further information about the subset of VHDL, see the vbe manual). A special feature has been introduced in the VHDL subset in order to allow the don't care description for external outputs and internal registers : A bit signal can take the `d' value. This value is interpreted as a `0' by the logic simulator asimut. Don't Cares are automatically generated by syf in the resulting `.vbe' file.
For the register signal, only one signal can appear in a guarded expression since the STABLE attribute is used. This attribute is only supported by technology mapping onto a standard cell library as sclib. bop is used for the first step of the synthesis process. It optimizes the behavioural description using a Reduced Ordered Binary Decision Diagram representation of logic functions. Two kinds of optimization are performed : local or global. A Local optimization keeps the architecture of the initial description by saving most of the intermediate signals. This mode is well-suited for regular circuits such as multipliers, adders. A Global optimization removes most of the intermediate signals so that the outputs are expressed in terms of the inputs or the internal registers. This mode is well-suited for random circuits such as FSMs.

Parameter file `.lax'
The parameter file is common with other logic synthesis tools and is used for driving the synthesis process. See lax(5) manual for more detail. lax uses a lot of parameters to guide every step of the synthesis process. Some parameters are globally used (for example, optimization level whereas others are specifically used (load capacitance for the netlist optimization only). Here is the default parameter file (see the user's manual for further information about the syntax of the `.lax' file):

Optimization mode = 2 (50% area - 50% delay) Optimization level = 2
Delayed input = 0
Early output = 0
Auxiliary signal saved = 0
Number of serial transistors = 4 in N and P area

Environment Variables

The following environment variables have to be set before using bop :

MBK_WORK_LIB gives the path of the directory of both input and output files (behavioural, structural and parameters description).

MBK_CATA_LIB gives the auxiliary paths of the directories of input files (behavioural description).

MBK_TARGET_LIB gives the path (single) of the directory of the selected standard cell library.

MBK_C4_LIB gives the path (single) of the directory for the three views of each cell generated by C4.

MBK_IN_LO gives the format of models instantiated in the structural description.

MBK_OUT_LO gives the output format of the structural description.

MBK_OUT_PH gives the output format for the layout of the cells generated by C4.

Options

Only one option can be given at the same time.

-o optimizes globally a behavioural description.
-l optimizes locally a behavioural description.

Example

You can call bop as follows :

bop -o alu4 area
bop -o alu4 area paramfile

See Also

scmap(1) , c4map(1) , xlmap(1) , proof(1) , yagle(1) , asimut(1) , vhdl(5) , scr(1) , sclib(1) .

Diagnostics

VHDL : Error - bad usage of the `stable' attribut" The stable attribut must be used with only one signal in a guarded expression

Bug Report

This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools. If you find bugs, please fill-in the form at http://asim.lip6.fr/alliance/support/bug-report/ Thanks for doing this.


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