alliance-support '1999
Re: Syf tool


Ludovic JACOMME (Ludovic.Jacomme@asim.lip6.fr)
Thu, 25 Nov 1999 20:21:38 +0100

On Wed, Nov 24, 1999 at 10:37:06AM -0200, Adriano Sarmento wrote: > Hello, > I am currently using Alliance 3.0 and I need to synthesize a Control > Unit that uses a Finite State Machine. But every time I try to use the > syf tool I get the following message : > syf: Number of states is zero > > Could you tell me why this is happening, please? Just in case I am > sending the file I want to synthesize. > > Thank you, > > Adriano Sarmento The file uc.vhd you have send us had VHDL syntaxicals errors but i have corrected all for you ... Syf support only one case statement on the current_state signals. I have modified all others case statement in your description. An End if was missing a the end of the second VHDL process. (I have also corrected it) The new description attached to this mail, is correct for Syf but there are some errors left. For example The state SRET3 is not used, and all FSM outputs are not assigned by all states. Regards, (_) ___ Ludovic JACOMME _ _ ( ) ( ) ( ) ( 6 ) Laboratoire LIP6, Equipe ASIM ( ) (_) ( _ ) Couloir 55-65, 2eme etage, ( )___ ( ) Universite P. et M. Curie (P6) (_____) (_) 4 place Jussieu, 75252 Paris Cedex 05 Tel: (33) 01.44.27.54.15 Fax: (33) 01.44.27.72.80 e-mail: Ludovic.Jacomme@asim.lip6.fr

ENTITY UC IS PORT( CK,RESET,Z,N,O,EQ,LT,GT,MBR: IN BIT; SEL_PC_INPUT,SEL_PC_NO_MBRIN: OUT BIT; SEL_MAR_INPUT: OUT BIT_VECTOR (1 DOWNTO 0); -- INICIO DO IR INSTR: IN BIT_VECTOR (3 DOWNTO 0); SEL_REG1, SEL_REG2:IN BIT_VECTOR (1 DOWNTO 0); -- FIM DO IR T: OUT BIT_VECTOR (2 DOWNTO 0); SEL_REGS: OUT BIT_VECTOR (1 DOWNTO 0); LD_RD,LD_MBRIN,LD_MBROUT,LD_REG,LD_MAR:OUT BIT; LDF,EN1,EN2,SEL_REGS_INPUT,LD_IR,SEL_L1:OUT BIT; SEL_L2: OUT BIT_VECTOR (1 DOWNTO 0); LD_PC,REQUEST,READWRITE: OUT BIT; SHTR,SHTL, CLEAR_PC, CLEAR_IR,LD_SP:OUT BIT); END UC; ARCHITECTURE arc OF UC IS type STATE_TYPE is (S1,S1B,S1C,SLD_IR,SLDA,SLDA_DIRETO,SLDA_DIRETO2,SLDA_DIRETO3,SLDA_INDIRETO,SLDA_INDIRETO2,SLDA_INDIRETO3,SLDA_IMEDIATO, SLDA_INDEXADO,SLDA_INDEXADO2,SLDA_INDEXADO3,SSTA,SSTA_DIRETO,SSTA_DIRETO2, SSTA_INDIRETO,SSTA_INDIRETO2,SSTA_INDIRETO3,SSTA_INDEXADO,SSTA_INDEXADO2,SSTA_INDEXADO3,SJMP,SJMP_ABSOLUTO,SJMP_RELATIVO,SJMP_RELATIVO2, SJMP_RELATIVO3,SJPC,SJPC_ABSOLUTO,SJPC_RELATIVO,SSELECT,SSEL_L2, SLD_R1_L1,SLD_R2_L2,SLD_RD,SLD_EM_R1,SSHTR,SSHTL,SINCREM_PC,SINCREM_PC2,SINCREM_PC3,SPUSH,SPUSH2,SPOP,SPOP2,SPOP3,SPOP4,SPOP5,SPOP6,SRET,SRET2,SRET3,SCALL,SCALL2,SCALL3,SCALL_ABS,SCALL4); -- PRAGMA CLOCK CK -- PRAGMA CURRENT_STATE CURRENT_STATE -- PRAGMA NEXT_STATE NEXT_STATE SIGNAL CURRENT_STATE, NEXT_STATE : STATE_TYPE; BEGIN ---- Unidade de Controle ---- process (CURRENT_STATE,RESET) begin if (RESET = '1') then EN1 <= '0'; EN2 <= '0'; LD_PC <= '0'; LDF <= '0'; LD_MBRIN <= '0'; LD_MBROUT <= '0'; LD_MAR <= '0'; LD_IR <= '0'; LD_REG <= '0'; LD_RD <= '0'; CLEAR_PC <= '1'; CLEAR_IR <= '1'; NEXT_STATE <= S1; else case CURRENT_STATE is -- LOAD no MAR -- when S1 => EN1 <= '0'; EN2 <= '0'; SEL_MAR_INPUT <= "00"; -- PC SEL_PC_INPUT <= '0'; -- MBROUT CLEAR_IR <= '0'; CLEAR_PC <= '0'; LD_PC <= '0'; LD_SP <= '0'; LD_MAR <= '1'; NEXT_STATE <= S1B; -- LE DA MEMORIA -- when S1B => LD_MAR <= '0'; REQUEST <= '1'; READWRITE <= '0'; -- Ler NEXT_STATE <= S1C; -- LOAD no MBROUT -- when S1C => REQUEST <= '0'; LD_MBROUT <= '1'; -- MODIFIED if ( INSTR="0001") then NEXT_STATE <= SLDA; -- LOAD REG->END elsif (INSTR="0010") then NEXT_STATE <= SSTA; -- LOAD REG->END elsif (INSTR="1001") then NEXT_STATE <= SJMP; -- JUMP INCONDICIONAL elsif (INSTR="1010") then NEXT_STATE <= SJPC; -- JUMP CONDICIONAL elsif (INSTR="1011") then NEXT_STATE <= SCALL; -- CALL SUB-ROUTINE else NEXT_STATE <= SLD_IR; end if; -- END MODIFIED when SLDA => REQUEST <= '0'; LD_MBROUT <= '0'; -- MODIFIED -- SELECIONA PELO MODO DE ENDERECAMENTO if (SEL_REG2="00") then NEXT_STATE <= SLDA_IMEDIATO; elsif (SEL_REG2="01") then NEXT_STATE <= SLDA_DIRETO; elsif (SEL_REG2="10") then NEXT_STATE <= SLDA_INDIRETO; else NEXT_STATE <= SLDA_INDEXADO; end if; -- END MODIFIED when SLDA_IMEDIATO => SEL_REGS_INPUT <= '0'; SEL_REGS <= SEL_REG1; LD_REG <= '1'; SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 CLEAR_IR <= '1'; -- RESETA A INSTRUCAO NEXT_STATE <= SINCREM_PC; when SLDA_DIRETO => SEL_MAR_INPUT <= "01"; -- MBROUT LD_MAR <= '1'; LD_MBROUT <= '0'; NEXT_STATE <= SLDA_DIRETO2; when SLDA_DIRETO2 => LD_MAR <= '0'; REQUEST <= '1'; READWRITE <= '0'; NEXT_STATE <= SLDA_DIRETO3; when SLDA_DIRETO3 => REQUEST <= '0'; LD_MBROUT <= '1'; SEL_REGS <= SEL_REG1; SEL_REGS_INPUT <= '0'; -- MBROUT CLEAR_IR <= '1'; -- RESETA A INSTRUCAO NEXT_STATE <= SLD_EM_R1; when SLDA_INDIRETO => SEL_MAR_INPUT <= "01"; -- MBROUT LD_MAR <= '1'; NEXT_STATE <= SLDA_INDIRETO2; when SLDA_INDIRETO2 => LD_MAR <= '0'; REQUEST <= '1'; READWRITE <= '0'; NEXT_STATE <= SLDA_INDIRETO3; when SLDA_INDIRETO3 => LD_MBROUT <= '1'; REQUEST <= '0'; NEXT_STATE <= SLDA_DIRETO; when SLDA_INDEXADO => SEL_L2 <= "11"; -- SELECIONA MBROUT NO L2 SEL_REGS <= "00"; -- SELECIONA O REG DE INDICE SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SLDA_INDEXADO2; when SLDA_INDEXADO2 => EN2 <= '1'; EN1 <= '1'; -- CARREGA NO L1 O VALOR DO REG DE INDICE T <= "001"; -- SOMA O INDICE LD_RD <= '1'; -- RESPONSABILIDADE DE GOTCHEBA NEXT_STATE <= SLDA_INDEXADO3; when SLDA_INDEXADO3 => EN2 <= '0'; EN1 <= '0'; SEL_MAR_INPUT <= "10"; -- RD LD_MAR <= '1'; NEXT_STATE <= SLDA_DIRETO2; when SSTA => REQUEST <= '0'; LD_MBROUT <= '0'; -- MODIFIED -- SELECIONA PELO MODO DE ENDERECAMENTO if (SEL_REG2="00") then SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; elsif (SEL_REG2= "01") then NEXT_STATE <= SSTA_DIRETO; elsif (SEL_REG2= "10") then NEXT_STATE <= SSTA_INDIRETO; else NEXT_STATE <= SSTA_INDEXADO; end if; -- END MODIFIED when SSTA_DIRETO => LD_MBROUT <= '0'; SEL_MAR_INPUT <= "01"; -- MBROUT LD_MAR <= '1'; SEL_REGS <= SEL_REG1; LD_MBRIN <= '1'; NEXT_STATE <= SSTA_DIRETO2; when SSTA_DIRETO2 => LD_MBRIN <= '0'; LD_MAR <= '0'; REQUEST <= '1'; READWRITE <= '1'; CLEAR_IR <= '1'; SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SSTA_INDIRETO => SEL_MAR_INPUT <= "01"; -- MBROUT LD_MAR <= '1'; NEXT_STATE <= SSTA_INDIRETO2; when SSTA_INDIRETO2 => REQUEST <= '1'; READWRITE <= '0'; LD_MAR <= '0'; NEXT_STATE <= SSTA_INDIRETO3; when SSTA_INDIRETO3 => REQUEST <= '0'; LD_MBROUT <= '1'; NEXT_STATE <= SSTA_DIRETO; when SSTA_INDEXADO => SEL_L2 <= "11"; -- SELECIONA MBROUT NO L2 SEL_REGS <= "00"; -- SELECIONA O REG DE INDICE SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SSTA_INDEXADO2; when SSTA_INDEXADO2 => EN2 <= '1'; EN1 <= '1'; -- CARREGA NO L1 O VALOR DO REG DE INDICE T <= "001"; -- SOMA O INDICE COM O VALOR BASE LD_RD <= '1'; -- RESPONSABILIDADE DE GOTCHEBA NEXT_STATE <= SSTA_INDEXADO3; when SSTA_INDEXADO3 => LD_RD <= '0'; EN2 <= '0'; EN1 <= '0'; SEL_REGS <= SEL_REG1; LD_MBRIN <='1'; SEL_MAR_INPUT <= "10"; -- RD LD_MAR <= '1'; NEXT_STATE <= SSTA_DIRETO2; when SJMP => LD_MBROUT <= '0'; REQUEST <= '0'; CLEAR_IR <= '1'; -- RESETA A INSTRUCAO -- MODIFIED if (SEL_REG2="00") then -- ABSOLUTO NEXT_STATE <= SJMP_ABSOLUTO; elsif (SEL_REG2="01") then -- RELATIVO NEXT_STATE <= SJMP_RELATIVO; else NEXT_STATE <= SINCREM_PC; end if; -- END MODIFIED when SJMP_ABSOLUTO => CLEAR_IR <= '0'; SEL_PC_INPUT <= '0'; -- MBROUT LD_PC <= '1'; NEXT_STATE <= S1; when SJMP_RELATIVO => LD_SP <= '0'; CLEAR_IR <= '1'; SEL_L1 <= '1'; -- PC SEL_L2 <= "11"; -- MBROUT T <= "001"; NEXT_STATE <= SJMP_RELATIVO2; when SJMP_RELATIVO2 => EN1 <= '1'; EN2 <= '1'; LD_RD <= '1'; SEL_PC_INPUT <= '1'; -- ULA NEXT_STATE <= SJMP_RELATIVO3; when SJMP_RELATIVO3 => EN1 <= '0'; EN2 <= '0'; LD_RD <= '0'; SEL_L1 <= '0'; -- VOLTA SELECAO DO L1 PARA REGS LD_PC <= '1'; NEXT_STATE <= S1; when SJPC => LD_MBROUT <= '0'; REQUEST <= '0'; if (SEL_REG2= "00") then -- ABSOLUTO NEXT_STATE <= SJPC_ABSOLUTO; elsif (SEL_REG2="01") then -- RELATIVO NEXT_STATE <= SJPC_RELATIVO; else NEXT_STATE <= SINCREM_PC; end if; when SJPC_ABSOLUTO => if (SEL_REG1 = "00") and (Z = '1') then NEXT_STATE <= SJMP_ABSOLUTO; elsif (SEL_REG1 = "01") and (GT = '1') then NEXT_STATE <= SJMP_ABSOLUTO; elsif (SEL_REG1 = "10") and (EQ = '1') then --IGUAL BY EDUARDO <<<<<<<<<<<<< antes era LT NEXT_STATE <= SJMP_ABSOLUTO; elsif (SEL_REG1 = "11") and (O = '1') then NEXT_STATE <= SJMP_ABSOLUTO; else CLEAR_IR <= '1'; -- RESETA A INSTRUCAO SEL_L2 <= "01"; -- PC SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; end if; when SJPC_RELATIVO => if (SEL_REG1 = "00") and (Z = '1') then NEXT_STATE <= SJMP_RELATIVO; elsif (SEL_REG1 = "01") and (GT = '1') then NEXT_STATE <= SJMP_RELATIVO; elsif (SEL_REG1 = "10") and (EQ = '1') then --IGUAL BY EDUARDO <<<<<<<<<<<<< antes era LT NEXT_STATE <= SJMP_RELATIVO; elsif (SEL_REG1 = "11") and (O = '1') then NEXT_STATE <= SJMP_RELATIVO; else CLEAR_IR <= '1'; -- RESETA A INSTRUCAO SEL_L2 <= "01"; -- PC SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; end if; -- LOAD no IR -- when SLD_IR => REQUEST <= '0'; LD_IR <= '1'; LD_MBROUT <= '0'; NEXT_STATE <= SSELECT; -- Seleciona a instrucao -- when SSELECT => LD_IR <= '0'; if (INSTR = "0000") then SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; elsif (INSTR = "0011" OR INSTR = "0100" OR INSTR = "0101" OR INSTR = "0110" ) then SEL_L2 <= "00"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 SEL_REGS <= SEL_REG1; NEXT_STATE <= SLD_R1_L1; elsif (INSTR = "0111" OR INSTR = "1000") then SEL_L2 <= "00"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 SEL_REGS <= SEL_REG1; NEXT_STATE <= SLD_R1_L1; elsif (INSTR = "0001" OR INSTR = "0010" OR INSTR = "1001" OR INSTR = "1010" OR INSTR = "1011") then SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; elsif (INSTR = "1101") then -- PUSH SEL_L2 <= "10"; -- SP NEXT_STATE <= SPUSH; elsif (INSTR = "1110") then -- POP SEL_L2 <= "10"; -- SP NEXT_STATE <= SPOP; elsif (INSTR = "1100") then -- RET SEL_L2 <= "10"; -- SP NEXT_STATE <= SPOP; end if; when SPUSH => SEL_REGS <= SEL_REG1; SEL_MAR_INPUT <= "11"; -- SP LD_MAR <= '1'; LD_MBRIN <= '1'; EN2 <= '1'; T <= "110"; -- DECREMENTAR SP --verificar se vai funcionar-- LD_RD <= '1'; NEXT_STATE <= SPUSH2; when SPUSH2 => EN2 <= '0'; REQUEST <= '1'; READWRITE <= '1'; LD_SP <= '1'; -- CARREGA O VALOR DECREMENTADO LD_MAR <= '0'; LD_RD <= '0'; LD_MBRIN <= '0'; SEL_L2 <= "01"; -- PC SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SPOP => EN2 <= '1'; T <= "111"; -- INCREMENTAR SP -- VER SE VAI FUNCIONAR -- LD_RD <= '1'; NEXT_STATE <= SPOP2; when SPOP2 => EN2 <= '0'; LD_RD <= '0'; LD_SP <= '1'; NEXT_STATE <= SPOP3; when SPOP3 => LD_SP <= '0'; SEL_MAR_INPUT <= "11"; -- SP LD_MAR <= '1'; NEXT_STATE <= SPOP4; when SPOP4 => LD_MAR <= '0'; REQUEST <= '1'; READWRITE <= '0'; --LER if INSTR = "1110" then NEXT_STATE <= SPOP5; end if; if INSTR = "1100" then NEXT_STATE <= SRET; end if; when SPOP5 => REQUEST <= '0'; LD_MBROUT <='1'; SEL_REGS <= SEL_REG1; SEL_REGS_INPUT <= '0'; NEXT_STATE <= SPOP6; when SPOP6 => LD_MBROUT <='0'; LD_REG <= '1'; SEL_L2 <= "01"; -- PC SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SRET => REQUEST <= '0'; LD_MBROUT <= '1'; NEXT_STATE <= SRET2; when SRET2 => SEL_PC_INPUT <= '0'; -- MBROUT LD_PC <= '1'; SEL_L2 <= "01"; -- PC SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SCALL => SEL_MAR_INPUT <= "11"; -- SP LD_MAR <= '1'; SEL_PC_NO_MBRIN <= '1'; LD_MBROUT <= '0'; LD_MBRIN <= '1'; SEL_L2 <= "10"; -- SP T <= "110"; -- DECREMENTA SP NEXT_STATE <= SCALL2; when SCALL2 => EN2 <= '1'; LD_MBRIN <= '0'; LD_MAR <= '0'; SEL_PC_NO_MBRIN <= '0'; REQUEST <= '1'; READWRITE <= '1'; -- WRITE NEXT_STATE <= SCALL3; when SCALL3 => EN2 <= '0'; REQUEST <= '0'; READWRITE <= '0'; LD_RD <= '1'; NEXT_STATE <= SCALL4; when SCALL4 => LD_SP <= '1'; if SEL_REG2 = "00" then NEXT_STATE <= SCALL_ABS; else NEXT_STATE <= SJMP_RELATIVO; end if; when SCALL_ABS => LD_SP <= '0'; LD_RD <= '0'; CLEAR_IR <= '1'; SEL_PC_INPUT <= '0'; -- MBROUT LD_PC <= '1'; NEXT_STATE <= S1; when SLD_R1_L1 => --SEL_REGS <= SEL_REG1; EN1 <= '1'; if (INSTR = "0111") or (INSTR = "1000") then T <= "000"; NEXT_STATE <= SLD_RD; else SEL_L2 <= "00"; SEL_REGS <= SEL_REG2; NEXT_STATE <= SLD_R2_L2; end if; when SLD_R2_L2 => EN1 <= '0'; EN2 <= '1'; if (INSTR = "0011") then -- soma T <= "001"; elsif (INSTR = "0100") then -- subtracao T <= "010"; elsif (INSTR = "0101") then -- and T <= "011"; elsif (INSTR = "0110") then -- comparacao LDF <= '1'; T <= "101"; end if; if (INSTR = "0110") then NEXT_STATE <= SSEL_L2; else NEXT_STATE <= SLD_RD; end if; -- ESTE ESTADO FOI ADICIONADO when SSEL_L2 => SEL_L2 <= "01"; -- seleciona o PC no L2 EN2 <= '0'; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SLD_RD => LDF <= '0'; EN2 <= '0'; LD_RD <= '1'; SEL_REGS <= SEL_REG1; SEL_REGS_INPUT <= '1'; -- RD if (INSTR = "0111") then NEXT_STATE <= SSHTL; elsif (INSTR = "1000") then NEXT_STATE <= SSHTR; else NEXT_STATE <= SLD_EM_R1; end if; when SLD_EM_R1 => CLEAR_IR <= '0'; LD_MBROUT <= '0'; LD_RD <= '0'; SHTR <= '0'; SHTL <= '0'; LD_REG <= '1'; SEL_L2 <= "01"; SEL_L1 <= '0'; -- SELECIONA OS REGS NO L1 NEXT_STATE <= SINCREM_PC; when SSHTR => EN1 <= '0'; SHTR <= '1'; SEL_REGS <= SEL_REG1; SEL_REGS_INPUT <= '1'; -- RD NEXT_STATE <= SLD_EM_R1; when SSHTL => EN1 <= '0'; SHTL <= '1'; SEL_REGS <= SEL_REG1; SEL_REGS_INPUT <= '1'; -- RD NEXT_STATE <= SLD_EM_R1; when SINCREM_PC => SEL_PC_INPUT <= '0'; -- VOLTA SELECAO DO PC PARA MBROUT LD_PC <= '0'; CLEAR_IR <= '0'; LDF <= '0'; REQUEST <= '0'; READWRITE <= '0'; LD_SP <= '0'; LD_REG <= '0'; EN1 <= '1'; EN2 <= '1'; T <= "111"; -- incrementa o PC NEXT_STATE <= SINCREM_PC2; when SINCREM_PC2 => LD_RD <= '1'; NEXT_STATE <= SINCREM_PC3; when SINCREM_PC3 => T <= "000"; SEL_PC_INPUT <= '1'; -- CARREGA NO PC A SAIDA DA ULA LD_PC <= '1'; EN1 <= '0'; EN2 <= '0'; LDF <= '0'; LD_MBRIN <= '0'; LD_MBROUT <= '0'; LD_MAR <= '0'; LD_RD <= '0'; NEXT_STATE <= S1; when others => end case; end if; -- DELETED CURRENT_STATE <= NEXT_STATE end process; process(CK) BEGIN IF ( CK = '1' AND NOT CK'STABLE ) THEN CURRENT_STATE <= NEXT_STATE; END IF; end process; END arc;

 



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