Guten Tag, On Mon, Jan 07, 2002 at 08:49:33AM +0100, fechner wrote: > Salut, > > est-ce que vous savez quel carry-lookahead-generateur additeur est utilisé par RSA (Brent-Kung/ Sklansky, etc.)? Es ist Brent-Kung. > Est-qu'il y a aussi des examples des additeurs en vhdl (ou quelques examples plus de addaccu, etc. ) > de votre institut ou ...? The interest of RSA (if any, ...) is its full custom tilling approach that, in the late 80, was using only one layers of metal and optimized exclusive-or cells to allow smooth integration in data-pathes. At that time, standard cells generators were not as usable as now, simply because of the technology constraints. Now a day, if you have a good behavioral description, then you don't need RSA. RSA can generate a VHDL behavior that you may map (do not try to optimize it!) on any standard cell library you like. I now Alain Guyot from TIMA has many adder generators that produce VHDL that you can synthesize. Try to contact him (Alain.Guyot@imag.fr). > Merci. Bitte, Fred -- @----------------------,-,-----,-------------------------------------@ |Ad augusta Frederic PETROT: MC d'ASIM/LIP6/UPMC (Paris VI) | |Per angusta 65-66/403 4 place Jussieu, 75252 Paris Cedex 05 | |Work:331 44275415 Fax:331 44277280 Frederic.Petrot@lip6.fr | |Home:331 47129513 //www-asim.lip6.fr/~fred/ | @--------------------------------------------------------------------@