alliance-support '1997
Unused signals (help)


JUAN CARLOS CHAPARRO DOS ANJOS (d8444611@solete.upc.es)
Tue, 15 Apr 1997 15:52:05 +0200 (MET DST)

Hi, I'm a spanish student of Informatica who is using Alliance. I have a problem with some input signals that I don't want to use in the module. The solution I found was to pass this signals through a buffer, but when I use Netoptim for general optimization it can't go on. What is the solution? What can I do with this signals ? I send you with this message the code of a simple module with this problem. ---------------------------------------------------- ENTITY shl1 IS PORT ( A : in bit_vector (2 downto 0) ; Y : out bit_vector (2 downto 0) ; vdd : in bit; vss : in bit ); END shl1; ARCHITECTURE structure OF shl1 IS COMPONENT b1_y PORT( i : in bit; t : out bit; vdd : in bit; vss : in bit); END COMPONENT; COMPONENT one_y PORT( t : out bit; vdd : in bit; vss : in bit); END COMPONENT; SIGNAL kk : bit; BEGIN uno : one_y PORT MAP (Y(0),vdd,vss); buf1 : b1_y PORT MAP (A(0),Y(1),vdd,vss); buf2 : b1_y PORT MAP (A(1),Y(2),vdd,vss); -- I don't want to use the signal A(2). I have put it in a buffer -- to avoid errors messages. But Netoptim don't work with this. bufk : b1_y PORT MAP (A(2),kk,vdd,vss); END structure; ------------------------------------------------------ Thank you in advance ! Sincerelly, J.C.Chaparro.

 



Alliance Web Site © 1997, 2002 ASIM/LIP6/UPMC, page maintained by Czo [Olivier Sirol] , last updated on 22 March 2001.