Hello, I downloaded alliance 3.2 for linux. I write circuit in VHDL language. How can I include library in my behavioral description? For example: ieee std_logic_1164 ieee std_logic_arith etc... In Model tech (commercial simulator) I write: .... .... Library IEEE; use IEEE.std_logic_1164.all; .... .... How can I use my VHDL library? Is standard TEXIO library supported? Is there a waver to wiev wave form after simulation? Thanking in advance, sinceraly Daniele ----------------------------------------------------------------------------- Daniele Pinto Member of IEEE Student Branch of Rome Member of Linux User Group of Rome e-mail: pinto@space.it t076054@spv.ing.uniroma1.it -----------------------------------------------------------------------------