This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at
ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie
4, place Jussieu
75252 PARIS Cedex 05
FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr
DP_MULTP - Unpipelined array multiplier.
#include <fpgen.h>
void DP_MULTP(
char *InstName, /* Instance name */
long MWide , /* Wide of the B operand */
long T0 , /* register after DNC */
long T1 , /* register before CLA */
long N , /* registers in the MUX+CSA */
DP_MULTP creates an unpipelined array multiplier and then instanciates it with the name InstName. The MULTPiplier bit-size is the full wide of the current data-path, set by the previous call to the function DP_DEFLOFIG. As a consequence the wide of the A input bus is always the full data-path wide, and the wide of the B input bus is given by the MWide structural parameter. The wide of the result P is N+M. For more informations about the various pipeline stages sets by T0, T1 and N structural parameters, please refer to amg(1) . The environment variable MBK_CATA_LIB have to contain an additionnal library path when using this macro-function, see fpgen(1) for more details.
Operator wide : Depends on the data-path wide.
DP_MULTP("mult_instance0", 16
input_a[31:0]",
input_b[15:0]",
ck",
sd",
st",
scin ,
scout",
output_p[47:0]", EOL);
amg(1) , fpgen(1) , dpr(1) , genlib(1) , mbk(1) , DP_DEFLOFIG(3) , DP_SAVLOFIG(3) , DP_LOCON(3) , DP_IMPORT(3) , DP_INV(3) , DP_BUSE(3) , DP_AND2(3) , DP_NAND2(3) , DP_AND3(3) , DP_NAND3(3) , DP_OR2(3) , DP_NOR2(3) , DP_OR3(3) , DP_NOR3(3) , DP_XOR2(3) , DP_XNOR2(3) , DP_NAND2MASK(3) , DP_NOR2MASK(3) , DP_XNOR2MASK(3) , DP_CONST(3) , DP_NMUX2CS(3) , DP_MUX2CS(3) , DP_MUX3CS(3) , DP_MUX4CS(3) , DP_MUX5CS(3) , DP_BUSE(3) , DP_NBUSE(3) , DP_ADD2F(3) , DP_ADSB2F(3) , DP_SHIFT(3) , DP_MULT(3) , DP_MULTP(3) , DP_NUL(3) , DP_PDFF(3) , DP_PDFFR(3) , DP_PDFFT(3) , DP_PDFFRT(3) , DP_RFG1C0(3) , DP_RFG1CC(3) , DP_RFG2C0(3) , DP_RFG2CC(3) ,
This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi
research team.
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