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Research projects

These projects range from medium complexity ASICs developed in 6 months by a couple of designers Data-safe, TNT, Smal, Rf264,etc...) to high complexity circuits (FRISC, Multick, StaCS, Rapid2, Rcube) developed by a team of PhD students.

Figure 7: Various chips designed with Alliance.
\begin{figure}\center
\begin{tabular}{\vert c\vert c\vert l\vert}
\hline
Project...
...0 000 & Message router for parallel machines\\
\hline
\end{tabular}\end{figure}

Figure 8: The 875 000 VLIW StaCS processor.
\begin{figure}\center
\leavevmode\psfig {file=stacs.eps,width=5cm}\end{figure}

The three largest circuits described in table 7 use not only standard-cells but also parameterized generators for regular blocks like RAMs, data-paths, or floating-point operators. The FRISC and TNT projects successfully used the Cadence and Compass place and route tools, and therefore prove the interoperability of the Alliance system.

A picture of the StaCS processor is shown figure 8.



 



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