alliance-support '2000
New to alliance


John Price (linux-guru@gcfl.net)
Sat, 22 Jan 2000 14:48:30 -0600 (CST)

Hi. Sorry that this is such an easy question, but I've gone through all the tutorials, and I have not figured this one out... I'm taking a VHDL class, and I understand that alliance supports a subset if the VHDL language. I'm trying to use a VHDL design with alliance, but it's not working. Is it true that you can have ONLY ONE entity block and ONLY ONE architecture block per file? If not, how do I have more than one? I keep getting errors when I try to add another. So if that is true, how do I make the tools read in all the files? I admit that I am new at this, so please bare with me. Thanx, John -- John Price <linux-guru@gcfl.net> PGP key at http://www.gcfl.net/~linux-guru/publickey.txt John's FreeDOS page -> http://www.gcfl.net/FreeDOS AIM ID "GCFL Owner" ICQ 24079586 -----BEGIN GEEK CODE BLOCK----- Version: 3.21 (http://www.geekcode.com to translate) GE d-> s++:+ a C++ UL++++ P+ L+++> E- W+++ N+ o+ K- W--- O- M-- V-- PS-- PE+ Y+ PGP++> t+ 5 X++ R- tv+ b+ DI+ D+ G+ e++> h r+++ y+++ ------END GEEK CODE BLOCK------

 



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