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Origin

This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie 4, place Jussieu 75252 PARIS Cedex 05 FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr

Name

berin - BEH data structure

Description

berin is a data structure used in BEH to represent a one-bit input signal. For an array, each element is represented by a single structure. Is considered as input signal either an input port of circuit (a port is said input when its value is readable inside the circuit) or, an internal register. An internal signal can also be considered as an input. berin has been designed to be used in a simply chained list.

A berin structure is composed of the following fields.

(char *) NAME
the object's name. For an array's element, the name is the array's identifier added to the element's index seperated by a ` ` (blank space). This string is supposed been produced by namealloc()

(struct chain *) OUT_REF list of simple out ports that depend on the current input.

(struct chain *) BUS_REF list of bussed out ports that depend on the current input.

(struct chain *) AUX_REF list of simple internal signals that depend on the current input.

(struct chain *) BUX_REF list of bussed internal signals that depend on the current input.

(struct chain *) REG_REF list of internal registers that depend on the current input.

(struct chain *) MSG_REF list of internal assert statements that depend on the current input.

(struct chain *) DLY_REF list of delayed internal signals that depend on

the current input.

(struct berin *) NEXT
next berin

See Also

beh(3) , beh_addberin(3) , beh_delberin(3) , beh_freberin(3) , beh_rmvberin(3) , namealloc(3)

Bug Report

This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools. If you find bugs, please fill-in the form at http://asim.lip6.fr/alliance/support/bug-report/ Thanks for doing this.


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