Hello, I'm working with Alliance 4 and I've been playing around with fpgen. I have the following problem: I have several output lines which must be connected to an output data bus through tri-state buffers. I wrote a little example (the attachment) : Is a circuit with 2 data lines of 16 bits (D1[15:0] and D2[15:0]) which are connected to a tri-state buffer each one. The tri-state outputs are connected to the module output (named Q[15:0]). I execute fpgen and all works fine. Then I create a pattern file and try asimut, which reports the error "illegal connections on signal ' q 0 ' " and so on.... In order to run the example, please do the following: 1. Unzip, untar to a directory.... 2. Create directory "mclib" 3. type "make prueba_fpgen.vst", which execute fpgen using the file "prueba_fpgen.c", creating the file "prueba_fpgen.vst" 4. type "make prueba_genpat.pat", which creates the pattern file 5. type "make prueba_pat", which executes asimut using "prueba_fpgen.vst" and "prueba_genpat.pat". At this point the error is reported. Thanks, sincerely Rafael Becerra ________________________________________________________________________ Get Your Private, Free E-mail from MSN Hotmail at http://www.hotmail.com