This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at
ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie
4, place Jussieu
75252 PARIS Cedex 05
FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr
beh_makgex - create a GEX for each expression in a description
void beh_makgex (fig_pnt)
struct befig *fig_pnt;
beh_makgex() reads a whole behavioral description (a BEFIG) and creates a GEX for each expression present in the description. A GEX is a structure able to represents binary expressions. It has almost the same organization as an ABL but, like a BDD, uses an index to represent variables. For simple signals (simple outputs - BEOUT, simple iternal signals - BEAUX, simple internal delayed signals - BEDLY), one GEX is created which corresponds to the expression that drives the signal. The GEX is stored into a specific field in the corresponding structure (NODE). For signals that have multiple expressions (registers, internal busses, bussed ports), one GEX is created for each expression and stored in the corresponding field of the structure (CNDNODE for conditions or VALNODE for the value).
fig_pnt represents the pointer of the description.
#include <beh109.h>
struct befig *befig_pnt;
beh_makgex (befig_pnt);
beh(3) , befig(3) , berin(3) , beaux(3) , bereg(3) , beh_debug(3) , beh_makbdd(3)
This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi
research team.
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If you find bugs, please fill-in the form at
http://asim.lip6.fr/alliance/support/bug-report/
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