Hi, my name is Antonio Collantes I'm starting to work with alliance, and I'm experiment some problems with the bbr program, that I'm trying to use to join two blocks that I have like an .ap file after the whole synthesis process. Using graal to instance the two blocks , I laced this blocks together to be routed and I saved this file like a new .ap called chip1.ap. After that I wrote a structural VHDL file called chip1.vst, in this file I have the interconnection between the two modules. When I try to route my chip1 file, the following message appears: checking and merging logical and physical view*** mbk error *** getloins impossible : instance memorod doesn't exist in figure chip1 When I instance those modules I puted the correct instance. (I think!!).. Could you please take a look of my files and tell me what is wrong and how to solve it?....... I send all of this files like attachment. (aco.zip) Thanks a lot, Antonio Collates ICTP