Hi, On Sat, Sep 19, 1970 at 04:20:08PM +0100, Horacio Neto wrote: > > Hello > > Is there a way to define (in the logic level library: *.vbe files) > and instantiate a Flip-Flop with Enable (using scmap)? > > Descriptions such as the following (in the tutorial file > "dlxm_chip.vbe") do not work: > VHDL : Error - bad usage of the 'stable' attribut > *** Compilation aborted... > > trap_v : block (CKFRZ_S = '0' and not CKFRZ_S'STABLE and WENTVR_S = '1') > begin > TVR_R <= guarded RESULT_S; > end block; > > Thanks in advance, Write you flipflop like this, and it should work better : trap_v : block (CKFRZ_S = '0' and not CKFRZ_S'STABLE) begin TVR_R <= guarded RESULT_S when (WENTVR_S = '1') else TVR_R; end block; Regards, Ludo. > > -- > > Horacio Neto > e-mail: hcn@inesc.pt > INESC - Instituto de Engenharia de Sistemas e Computadores > Rua Alves Redol, 9, 1000 Lisboa - PORTUGAL > Phone: + 351 21 3100366 > Fax: + 351 21 3145843 -- (_) ___ Ludovic JACOMME _ _ ( ) ( ) ( ) ( 6 ) Laboratoire LIP6, Equipe ASIM ( ) (_) ( _ ) Couloir 55-65, 2eme etage, ( )___ ( ) Universite P. et M. Curie (P6) (_____) (_) 4 place Jussieu, 75252 Paris Cedex 05 Tel: (33) 01.44.27.54.15 Fax: (33) 01.44.27.72.80 ICQ: 62526530 mailto: Ludovic.Jacomme@asim.lip6.fr http: //asim.lip6.fr/~ludo