According to the interoperability constraints, each Alliance tool can operate as a standalone program as well as a part of the complete Alliance design framework. Each Alliance tool therefore supports several standard VLSI description formats : SPICE, EDIF, VHDL, CIF, GDS2. In that respect, the tools ouputs are fully usable under the Compass and Cadence Opus environnement, provided these tools have the necessary configuration files. The Alliance tools support a zero-default top-down design methodology with not only construction tools -- layout editor, automatic place & route -- but also validation tools, from design rule checker to functional abstraction and formal proof.