This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at
ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie
4, place Jussieu
75252 PARIS Cedex 05
FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr
DP_OR3 - logical or 3
#include <fpgen.h>
void DP_OR3(
char *InstName, /* Instance name */
long Width , /* Number of bits */
long Slice , /* Index of the bottom slice */
long Drive , /* Fanout : among 1 or 2 */ char *BusI0 , /* IN First Operand DATA */ char *BusI1 , /* IN Second Operand DATA */ char *BusI2 , /* IN Third Operand DATA */ char *BusNO , /* OUT Complemented Result output DATA */ char *BusO , /* OUT Direct Result output DATA */ EOL);
DP_OR3 creates a logical or 3 of Width bits and then instanciates it with the name InstName. The maximal authorized value for Width is the full width of the current data-path, set by the previous call to the function DP_DEFLOFIG. In the layout the leaf cells are placed on the slices numbered from Slice to Slice+Width-1 (the bottom slice of the whole data-path is numbered zero).
Operator wide : 30 lambdas.
DP_OR3("or3_instance0", 32,
0, 1, input_i0[31:0]",
input_i1[31:0]",
input_i2[31:0]",
output_no[31:0]",
output_o[31:0]", EOL);
fpgen(1) , dpr(1) , genlib(1) , mbk(1) , DP_DEFLOFIG(3) , DP_SAVLOFIG(3) , DP_LOCON(3) , DP_IMPORT(3) , DP_INV(3) , DP_BUSE(3) , DP_AND2(3) , DP_NAND2(3) ,
This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi
research team.
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http://asim.lip6.fr/alliance/support/bug-report/
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