Table of Contents

Name

scr
- Standard Cell Router

Origin

This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie 4, place Jussieu 75252 PARIS Cedex 05 FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr

Synopsis

scr
[-p] [-r] [-c ChannelName] [-i IterationNumber ] [-l RowNumber] [-a SupplyNumber] [-o OutputFileName] source

Description

scr is an automatic place and route tool for standard-cells.

1/ standard cells
scr uses a catalog file whose name is defined by the environment variable MBK_CATAL_NAME. This file must contain the standard cells names. The cells must have the same height, but they can have different width (multiple of the pitch).
Power and ground connectors defined by the environment variable MBK_VDD and MBK_VSS must be
in metal1 on the WEST and EAST sides of the abutment-box of the cells. Other connectors must be in metal2 only on the NORTH and SOUTH sides of the abutment-box of the cells. They must be pitched. If two connectors of the cell have the same name, the router will consider them electrically connected inside the cell. scr uses this feature to go through the cell.
One or several attributes can be associated with each cell. The attributes that concern the router are:
C : for Catalog, associated to the leaf cells that will not be flattened. F : for Feed-through, associated to the cells which are used as feedthrough, a feed-through may do not appear in the logical net-list. For more details on the catalog file see catal(5) . The files describing the physical and the logical view for each cell must be located in one of the directories defined by the environment variable MBK_CATA_LIB.

2/ input net-list
The source file describes the input net-list. scr supports a hierarchical net-list. In this case the net-list is flattened by the router according to the catalog file. The net-list format can be : structural VHDL, EDIF, or ALLIANCE internal format according to the environment variable MBK_IN_LO. 3/ output layout
The file containing the routed block will have the name source if the -o option is not used, otherwise the OutputFileName is used. The output format is defined by the environment variable MBK_OUT_PH. The router uses two layers for routing: metal1 for the horizontal wires, and metal2 for the vertical wi res.
The first metal1 horizontal wires are six LAMBDAs from the NORTH and SOUTH abutment-box sides of the cells.
The horizontal PITCH between metal1 wires is equal to five LAMBDAs. A six LAMBDAs margin is ensured between the extreme horizontal wires of the circuit and its NORTH and S OUTH abutment-box sides. The first metal2 vertical wires are three LAMBDAs from the WEST and EAST abutment-box sides of routed circu it. The vertical PITCH between metal2 wires is equal to six LAMBDAs.
There are two possibilities for the output layout: If the -c option is used, the routing channels and cell rows are instanciated as intermediate hierarchical blocks.(their names are prefixed by ChannelName). Otherwise the instances of the routed figure are the input net-list leaf cells.
The names for power and ground sources are given by the environment variables MBK_VDD and MBK_VSS. The default values are vdd and vss. All power and ground are internally connected by two vertical metal2 wires (one for VDD, one for VSS). It is possible to increase the number of vertical power and ground wires with the -a option.

4/ Optional cells placement file
A user defined placement can be specified, thanks to a placement file. The optional placement file must have the same name as the input net-list with a extension that denotes the format defined by the environment variable MBK_IN_PH.
The circuit to be routed must be composed of horizontal rows. The height of each row is the height of the standard-cells. The cells must not overlap. This placement can also be hierarchical. In this case the hierarchy must be the same as the input net-list. Each logical instance must correspond to one and only one physical instance, and each physical instance must correspond to one and only one logical instance. This constraint does not apply to the physical cells with F attribute into the catalog file.

5/ Optional connectors and feed-through placement file The placement of connectors can be also specified : which connector on which side, and the relative order of connectors on one side. The same logical connector can be placed on several sides. This information is contained in a file that has the same name as the input net-list file, with the .scr extension. In this source.scr file, all lines begining whith a # (sharp) are comments. To define the position of the connectors four instructions can be used :

PLACE_PHCON_NORTH name order ;
PLACE_PHCON_SOUTH name order ;
PLACE_PHCON_WEST name order ;
PLACE_PHCON_EAST name order ;

where name is the logical connector name and order is the index. If the relative placement on a given side is undefined the order parameter takes the value -1".
In WEST and EAST sides, the order parameter of connectors on these sides can not be defined by the user (so the order parameter on these sides takes the value -1").
A vectorized syntax is usable for buses. scr can be place vertical and horizontal feed-through in the routed circuit (this can be used by the floor-plan router to route over the block). Two instructions are usable :

HOR_FEED_THROUGH n ;
VER_FEED_THROUGH m ;

where n and m are the number of feed-through. The horizontal feed-throughs are placed in the middle channel of the routed circuit.
The vertical feed-throughs are placed regulary over the entire width of the routed circuit according to the number of vertical power and ground wires. If a null number is given for -a option, the vertical feed-throughs are placed in the middle of the routed circuit. This is an example :

PLACE_PHCON_NORTH in3 4;
PLACE_PHCON_NORTH in2 1;
PLACE_PHCON_NORTH in1 2;
PLACE_PHCON_SOUTH in0 4;
PLACE_PHCON_SOUTH in5 0;
PLACE_PHCON_WEST in7 -1;
PLACE_PHCON_EAST in6 -1;

The result of this set of instructions, is a circuit having on it's NORTH side four connectors whose names are the following order (i.e. from left to right : in2, in1 and in3), on it's SOUTH side two connectors whose names are the following order (i.e. from left to right : in5 and in0).
If the position of a connector on a given side is not crucial the order" parameter may be set to -1".
for examples :

PLACE_PHCON_NORTH in3 -1;

The syntax has the same structure as before but the parameters name and order are written as vectors.
for examples :
The following sets of instruction give the same result.

Non vectorized structure :
PLACE_PHCON_NORTH in[3] 4;
PLACE_PHCON_NORTH in[2] 3;
PLACE_PHCON_NORTH in[1] 2;
PLACE_PHCON_NORTH in[0] 1;
PLACE_PHCON_WEST in[5] -1;
PLACE_PHCON_WEST in[6] -1;

Vectorized structure :
PLACE_PHCON_NORTH in[0:3] 1:4;
PLACE_PHCON_WEST in[0:3] -1;

To vectorized buses, the characters () can be used instead []".

Options

-o OutputFileName renames the output file name to OutputFileName. By default, the name of the input net-list file is used.

-p
This option invokes the automatic placement process.
-r
This option invokes the automatic routing process. So scr must be used with at least one of -p or -r options:
-p
automatic place, no route.
-r
automatic route, no place.
-p -r
automatic place and route.
-c ChannelName
If this option is used ,the rows and channels will be instanciated as intermediate hierarchical levels. Otherwise the result will be flattened to the standard cells.
-i IterationNumber
This option is used to improve the quality of the placement, and consequently of the routing. The default value is the number of cells.
-l RowNumber
This option allows the designer to set the number of rows. The default value is computed to provide a square result.
-a SupplyNumber
This option allows the designer to set the number of vertical power and ground wires. The default value is one.

Environment

scr relies on the proper setting of the following environment variables :

MBK_CATA_LIB(1)
gives the path to the cell libraries.
MBK_WORK_LIB(1)
furnishes the path to the working directory.
MBK_IN_PH(1)
indicates the input layout format.
MBK_OUT_PH(1)
indicates the output layout format.
MBK_IN_LO(1)
indicates the input structural file format.
MBK_VDD(1)
sets the name of power supply. vdd is the default. Every external port of the circuit whose name contain this string will be considered as a power supply.
MBK_VSS(1)
sets the name of ground. vss is the default. Every external port of the circuit whose name contain this string will be considered as a ground.

Examples

To use scr, some environment variables must be set : If the ALLIANCE format is used, the user must have the following environment: MBK_CATA_LIB =/labo/cells/sclib/prol10 MBK_IN_LO =vst
MBK_IN_PH =ap
MBK_OUT_PH =ap
MBK_CATAL_NAME =CATAL
MBK_WORK_LIB =.
MBK_VDD =vdd
MBK_VSS =vss
The command line to be executed for routing the circuit called, for example, core with all options is:

scr -p -r -i 500 -l 6 -c chan -a 2 -o core_r core The input net-list will be the file core.vst The resulting file will be core_r.ap The number of iterations is equal to 500 The number of rows is equal to 6 The result will be hierarchical
Two power and ground wires are placed in the routed circuit.

scr -r -p -a 3 -o alur alu
This command makes a placement and routing on the circuit alu" with 3 vertical power and ground wires. The resulting file will be alur.ap

scr -r -p -a 0 alu
If a null number is given for the -a option as in this example,there will be no vertical power and ground wires and all the external power and ground connectors will have different names. The resulting file will be alu.ap

See Also

mbkenv(3) , bbr(1) , sclib(1) , ring(1) , genlib(1) , catal(5) ,

Diagnostics

1/ Segment and via lists must be NULL!! This message can appear if:
-The user tries to route a figure already routed. -The catalog file is not accessible, or it is incomplete and the router has flattened a cell not included in the catalog.

2/ Logic INS_NAME does not exist in the physical view!! Logic instance in the net-list is not declared in the placement. 3/ Physical INS_NAME does not exist in the logical view!! Physical instance in the placement file is not declared in the net-list.

4/ Physical connector CON_NAME does not exist in the logical view!! The physical internal connector called CON_NAME is not declared in the net-list.

5/ Impossible configuration : the number of connectors to be placed on south/north side is greater than the existing number of pitchs. In this case, the user may user lower number of rows to overcome this placement problem.

Bug Report

This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools. If you find bugs, please fill-in the form at http://asim.lip6.fr/alliance/support/bug-report/ Thanks for doing this.


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