NAYAN B. KAWA software engineer. Venus Electronics and Controls To alliance team Hi, I am Nayan asking you few questions as far as capturing and simulation of the structural views are concerned. I used the following steps for the design flow. ------------------------------------------------------------------------ 1 I captured a behavioral view for a two input and_gate as and2bit.vbe. 2 I then compliled the and2bit.vbe using following command : $MBK_WORK_LIB asimut -b -c and2bit.vbe The compilation was successful. 3 I then created a correct pattern file viz. and2bit.pat using the alliance tool genpat and a and2bit.c file. 4 I was then able to successfully simulate the behavioral view and2bit.vbe using following command. $MBK_WORK_LIB asimut -b and2bit and2bit spc1 Here I got spc1.pat file without andy error. 5 This is the step where I am getting stuck. My target is to "generate" a structural view as and2bit.vst so that I can use asimut to simulate the same using the pattern file and2bit.pat file using following command. $MBK_WORK_LIB asimut and2bit and2bit spc2 But how do I generate the and2bit.vst file? Yes I know that it can be generated using the tool genlib. But that tool requires two files as parameter viz. core.c and and2bit.c Hence my questions are as follows: Question1 : Shall I have to write this and2bit.c file myself or is there any tool available to generate this file from the and2bit.vbe which I might be missing or not aware of? Question2 : What about core.c file where to get that file from or is it generated by another tool. Also, I have looked at the core.c for the 2 tutorial examples addacu and amd2901. Should I use either one of them with modifications ? 6 I tried generating and2bit.vst file using alliance tools bop and scmap respectively and I was successful to get and2bit.vst. But when I tried simulating this and2bit.vst file using following command: $MBK_WORK_LIB asimut and2bit and2bit spc2 Here I got errors of the type : Illegal connections on signal 'xx' cannot continue further more Have a nice day... -------------------------------------------------------------------- Please help me out on these issues. I am running allaince VLSI CAD system(3.2) on linux kernel 2.0.29 (Slackware distribution) on Intel's pentium 166MHz. I am using asimut version v2.01 from the Alliance 3.2 suite. Waiting for a favourable reply. Thanking you, Yours faithfully, Nayan B. Kawa