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Origin

This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
LIP6/ASIM
University P. et M. Curie 4, place Jussieu 75252 PARIS Cedex 05 FRANCE
Fax : {33/0} 1.44.27.62.86
E-mail support : alliance-support@asim.lip6.fr

Name

bereg - BEH data structure

Description

bereg is a data structure used in BEH to represent a one-bit internal register. For an array, each element is represented by a single structure. These are organized in the reverse order of the array's range declaration. bereg has been designed to be used in a simply chained list.

A bereg structure is composed of the following fields.

(char *) NAME
the register's name. For an array's element, the name is the array's identifier added to the element's index seperated by a ` ` (blank space). This string is supposed been produced by namealloc()

(struct biabl *) BIABL list of drivers using ABLs to represent expressions

(struct binode *) BINODE list of drivers using BDDs to represent expressions

(struct bereg *) NEXT
next bereg

See Also

log(1) , beh(3) , biabl(3) , binode(3) , beh_addbereg(3) , beh_delbereg(3) , beh_frebereg(3) , beh_rmvbereg(3) , namealloc(3)

Bug Report

This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools. If you find bugs, please fill-in the form at http://asim.lip6.fr/alliance/support/bug-report/ Thanks for doing this.


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