Dear Sir, I am student of the electronics deptt. kurukshetra university, kurukshetra and working on ALLIANCE package. Sir,I have simulated the VHDL file and core netlist(from GENLIB) using ASIMUT.BUT when I simulate the pad netlist it demands some files like pck_sp.vst etc which are not present in library,rather we have pck_sp.al like files. Please, guide me how I can solve this problem. I shall be very thankfull to you. Yours faithfully, sachin dev kurukshetra university, kurukshetra, INDIA