Alliance provides also a pad library. This library also uses a symbolic layout approach, and therefore a whole chip can be targeted on several technology without even the core to pad routing. A very robust approach has been enforced, as the pads are subject to electrostatic discharge, and also more sensible to latch-up than the other parts of the circuit due to the amount of current that flows through them.
Chips using these pads have been fabricated on ES2 1.0m,
AMS 1.2
m and SGS-Thomson 0.5
m technology and work as
expected.